If X and Y are the inputs, the given circuit | vedclass

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(D) The circuit consists of three $NAND$ gates. Let the inputs be $X$ and $Y$.$1$. The first two $NAND$ gates act as $NOT$ gates because their inputs

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$NOR$ gate

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(D) The circuit consists of three $NAND$ gates. Let the inputs be $X$ and $Y$.$1$. The first two $NAND$ gates act as $NOT$ gates because their inputs are tied together (shorted). Thus, the outputs of the first stage are $\overline{X}$ and $\overline{Y}$.$2$. These outputs are fed into the second $NAND$ gate. The output of this gate is $\overline{(\overline{X} \cdot \overline{Y})}$.$3$. By De Morgan's Law, $\overline{(\overline{X} \cdot \overline{Y})} = X + Y$. This represents an $OR$ operation.$4$. The final $NAND$ gate acts as a $NOT$ gate, so the final output is $\overline{X + Y}$, which is the logic for a $NOR$ gate.

If $X$ and $Y$ are the inputs, the given circuit works as . . . . . . .

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