The following configuration of gates is equiv | vedclass

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(C) The given circuit consists of two $NOR$ gates acting as $NOT$ gates,followed by a $NOR$ gate.$1$. The first two gates are $NOR$ gates with both in

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$AND$

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(C) The given circuit consists of two $NOR$ gates acting as $NOT$ gates,followed by a $NOR$ gate.$1$. The first two gates are $NOR$ gates with both inputs tied together. $A$ $NOR$ gate with inputs $A$ and $A$ gives output $\overline{A+A} = \overline{A}$.$2$. Similarly,the second $NOR$ gate with inputs $B$ and $B$ gives output $\overline{B+B} = \overline{B}$.$3$. These two outputs are fed into the final $NOR$ gate.$4$. The output $Y$ of the final $NOR$ gate is $Y = \overline{\overline{A} + \overline{B}}$.$5$. By De Morgan's Law,$\overline{\overline{A} + \overline{B}} = \overline{\overline{A}} \cdot \overline{\overline{B}} = A \cdot B$.$6$. Therefore,the output $Y = A \cdot B$,which is the Boolean expression for an $AND$ gate.

The following configuration of gates is equivalent to

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